Manipulating stress is an effective way of improving charge carrier mobility in a metal oxide semiconductor field effect transistor (MOSFET) and increasing the transconductance (or reduced serial resistance) of the MOSFET that requires relatively small modifications to semiconductor processing while providing significant enhancement to MOSFET performance.
When stress is applied to the channel of a semiconductor transistor, the mobility of carriers, and as a consequence, the transconductance and the on-current of the transistor are altered from their original values for an unstressed semiconductor. This is because the applied stress and the resulting strain on the semiconductor structure within the channel affects the band gap structure (i.e., breaks the degeneracy of the band structure) and changes the effective mass of carriers. The effect of the stress depends on the crystallographic orientation of the plane of the channel, the direction of the channel within the crystallographic orientation, and the direction of the applied stress.
The effect of stress on the performance of semiconductor devices, especially on the performance of a MOSFET (or a “FET” for short) device built on a silicon substrate, has been extensively studied in the semiconductor industry. The response of the performance of the MOSFET depends on the direction and type of the stress. For example, in a PMOSFET (or a “PFET” in short) utilizing a silicon channel having current flow in a [110] orientation and formed in a (001) silicon substrate, the mobility of minority carriers in the channel (which are holes in this case) increases under a longitudinal compressive stress along the direction of the channel, i.e., the direction of the movement of holes or the direction connecting the drain to the source. Conversely, in an NMOSFET (or an “NFET” for short) utilizing a silicon channel having current flow in a [110] orientation and formed in a (001) silicon substrate, the mobility of minority carriers in the channel (which are electrons in this case) increases under longitudinal tensile stress along the direction of the channel, i.e., the direction of the movement of electrons or the direction connecting the drain to the source. The direction of a longitudinal stress for enhancing the carrier mobility is opposite between the PMOSFET and NMOSFET.
In contrast, enhancement of carrier mobility by a transverse stress on a MOSFET utilizing a silicon channel having current flow in the [110] orientation and formed in the (001) silicon substrate requires a tensile transverse stress irrespective of the type of the MOSFET. In other words, tensile transverse stress enhances the carrier mobility of a PMOSFET and the carrier mobility of an NMOSFET. Thus, the direction of a compressive stress for enhancing the carrier mobility is the same between the PMOSFET and NMOSFET.
Prior art stress-generating structures such as stress-generating liners formed above a semiconductor substrate and on a gate line is inefficient in transmission of a stress to a channel region of a transistor since the stress is transmitted through gate spacers, and the magnitude of the stress tends to decay rapidly with depth into the semiconductor substrate. Further, in the case of a PMOSFET, no mechanism is provided for reversing the direction of stress between the longitudinal stress and the transverse stress. In other words, if the longitudinal stress is compressive and beneficial to enhance of performance of the PMOSFET, the transverse stress is also compressive, which is disadvantageous to enhancement of performance of the PMOSFET.
In view of the above, there exists a need to efficiently transmit stress from a stress-generating structure to a channel in a transistor.
Further, there exists a need to decouple the direction of a longitudinal stress and the direction of a transverse stress applied to a channel of a transistor such that both the longitudinal stress and the transverse stress may induce advantageous effects to the mobility of charge carriers in the channel.